Re: CypherPunks: Efficient Hardware DES.

[Brendan Simon <bsimon@ctam.com.au>]

"John A. Limpert" wrote:

> Brendan Simon wrote:
> > The above is a direct extract from the book.  The book is printed in
> > 1996.  I was just wondering if anyone new how the reduction of 16 cycles
> > to 4 cycles work.  Is it a manipulation of the algorithm or some kind of
> > pipelining trick ?
>
> I don't see why it couldn't be done in one cycle if you are willing to
> throw transistors at it. Just think of it as unrolling a loop.

This is the only "obvious" solution that I could think of.  It basically
becomes one big combinational logic circuit.  ie. no feed back.  The worst
case propagation delay is required to figure out the throughput of the
algorithm.  I figure that this is too simple and that there would be many DES
chips on the market that would have this implementation (unless the cost is
prohibitive).  I just get the feeling that it something a little more
elegant, but maybe I'm reading too much into it ?

Brendan Simon.